The CPU power states C0–C3 are defined as follows:
- C0 is the operating state.
- C1 (often known as Halt) is a state where the processor is not executing instructions, but can return to an executing state essentially instantaneously. All ACPI-conformant processors must support this power state. Some processors, such as the Pentium 4, also support an Enhanced C1 state (C1E or Enhanced Halt State) for lower power consumption,.
- C2 (often known as Stop-Clock) is a state where the processor maintains all software-visible state, but may take longer to wake up. This processor state is optional.
- C3 (often known as Sleep) is a state where the processor does not need to keep its cache coherent, but maintains other state. Some processors have variations on the C3 state (Deep Sleep, Deeper Sleep, etc.) that differ in how long it takes to wake the processor. This processor state is optional.
|Device power state
|Device is on and running. It is receiving full power from the system and is delivering full functionality to the user.
|Device is fully functional at a lower power or performance state than D0. D1 is applicable when the device is being used, but peak performance is unnecessary and power is at a premium.
|Device is partially powered, with automatic wakeup on request.
|Device is partially powered, with device-initiated wakeup, if available. A device in state D3 is sleeping but capable of raising the system power state on its own. It consumes only enough power to be able to do so; which must be less than or equal to the amount of power used in state D2.
|Device has no power. A device in state D4 should not be consuming any significant power. Some peripheral buses require static terminations that intrinsically use non-zero power when a device is physically connected to the bus. A device on such a bus can still support D4.